 |  CMOS Digital Integrated Circuits: Analysis and Design, 3/e Sung-Mo Kang,
University of California-Santa Cruz
Yusuf Leblebici,
Swiss Federal Institute of Technology
Book Preface
Complementary metal oxide semiconductor (CMOS) digital integrated circuits are the enabling technology for the modern information age. Because of their intrinsic features in low-power consumption, large noise margins, and ease of design, CMOS integrated circuits have been widely used to develop random access memory (RAM) chips, microprocessor chips, digital signal processor (DSP) chips, and application-specific integrated circuit (ASIC) chips. The popular use of CMOS circuits continues to grow with the increasing demands for low-power, low-noise integrated electronic systems in the development of portable computers, personal digital assistants (PDAs), portable phones, and multimedia agents.
Since the field of CMOS integrated circuits is very broad, it is conventionally divided into digital CMOS circuits and analog CMOS circuits. This book is focused on the CMOS digital integrated circuits. However, it should be noted that the boundary between classical digital and analog CMOS design is becoming increasingly blurred, especially with the challenges presented by very deep sub-micron (VDSM) fabrication technologies, very low operating voltages, and operating frequencies extending well into the GHz range. Therefore, we attempt to present the analysis and design of digital CMOS integrated circuits from an “analog” point-of-view, i.e., taking into account the analog, non-discrete nature of the devices and circuits that are used to implement digital functions.
The origins of this textbook date back to the early 1990s when both authors were intensively involved in undergraduate and graduate level teaching of digital IC fundamentals. At the University of Illinois at Urbana-Champaign, where both of us were teaching at the time, we tried some of the available textbooks on digital MOS integrated circuits for our senior-level technical elective course, ECE382—Large Scale Integrated Circuit Design. Students and instructors alike realized, however, that there was a need for a new book with more comprehensive treatment of CMOS digital circuits. Thus, our textbook project was initiated several years ago by assembling our own lecture notes. Since 1993, we have used evolving versions of this material at the University of Illinois at Urbana-Champaign, at Istanbul Technical University, at Worcester Polytechnic Institute, and at the Swiss Federal Institute of Technology in Lausanne. Both authors were very much encouraged by comments from their students, colleagues, and reviewers. The first edition of CMOS Digital Integrated Circuits: Analysis and Design was published in late 1995.
Soon after publishing the first edition, we saw the need for updating it to reflect many constructive comments we were receiving from instructors and students who used the textbook. We intended to include and update important topics such as low-power circuit design, interconnects in high-speed circuit design, as well as the deep sub-micron circuit design issues, and to provide more rigorous treatment of new developments in memory circuits. We also felt that in a very rapidly developing field such as CMOS digital circuits, the quality of a textbook can only be preserved by timely updates reflecting the current state-of-the-art. This realization has led us to embark on the extensive and continuous revision of our work, with the Second Edition appearing in 1998 and the Third Edition in 2002, to reflect recent advances in technology and in circuit design practices.
This book, CMOS Digital Integrated Circuits: Analysis and Design, is primarily intended as a comprehensive textbook at the senior level and first-year graduate level, as well as a reference for practicing engineers in the areas of integrated circuit design, digital design, and VLSI. Recognizing that the area of digital integrated circuit design is evolving at an increasingly faster pace, we have made our best effort to present up-to-date materials on all subjects covered. This book contains fifteen chapters; and we recognize that it would not be possible to cover rigorously all of this material in one semester. Thus, we would propose the following based on our teaching experience: At the undergraduate level, coverage of the first ten chapters would constitute sufficient material for a one-semester course on CMOS digital integrated circuits. Time permitting, some selected topics in Chapter 11, Low-Power CMOS Logic Circuits, Chapter 12, BiCMOS Logic Circuits, and Chapter 13, Chip Input and Output (I/O) Circuits can also be covered. Alternatively, this book can be used for a two-semester course, allowing a more detailed treatment of advanced issues, which are presented in the later chapters. At the graduate level, selected topics from the first ten chapters plus the last five chapters can be covered in one semester.
The first eight chapters of this book are devoted to a detailed treatment of the MOS transistor with all its relevant aspects; to the static and dynamic operation principles, analysis, and design of basic inverter circuits; and to the structure and operation of combinational and sequential logic gates. Note that the introduction chapter has been significantly expanded to include a detailed presentation of VLSI design methodologies. Since the digital IC design techniques discussed in the first half of this book are directly relevant for digital VLSI and ASIC design, we felt that the context should be presented at the very beginning of the book. The issues of on-chip interconnect modeling and interconnect delay calculation are covered extensively in Chapter 6, which provides a complete view of switching characteristics in digital integrated circuits. A separate chapter (Chapter 9) has been reserved for the treatment of dynamic logic circuits, which are used in state-of-the-art VLSI chips. Chapter 10 has been completely revised in both content and presentation; it offers an in-depth presentation of many state-of-the-art semiconductor memory circuits.
Recognizing the increasing importance of low-power circuit design, we dedicate one chapter (Chapter 11) to low-power CMOS logic circuits, which provides a comprehensive coverage of methodologies and design practices that are used to reduce the power dissipation of large-scale digital integrated circuits. BiCMOS digital circuit design is examined in Chapter 12, with a thorough coverage of bipolar transistor basics. In view of the continuing use of bipolar and BiCMOS circuits in very high-speed designs, we believe that at least one chapter should be allocated to cover the basics of bipolar transistors. Next, Chapter 13 provides a clear insight into the important subject of chip I/O design. Critical issues such as ESD protection, clock distribution, clock buffering, and latch-up phenomena are discussed in detail. Finally, the more advanced but very important topics of design for manufacturability and design for testability are covered in Chapters 14 and 15, respectively.
The authors have long debated the coverage of nMOS circuits in this book. We have concluded that some coverage should be provided for pedagogical reasons. Studying nMOS circuits will better prepare readers for analysis of other field effect transistor (FET) circuits such as GaAs circuits, the topology of which is quite similar to that of depletion-load nMOS circuits. Thus, to emphasize the load concept, which is still widely used in many areas in digital circuit design, we present basic depletion-load nMOS circuits along with their CMOS counterparts in several places throughout the book.
Although an immense amount of effort and attention to detail were expended to prepare the camera-ready manuscript, this book may still have some flaws and mistakes due to erring human nature. The authors would welcome and greatly appreciate suggestions and corrections from the readers, for the improvement of technical content as well as the presentation style.
ACKNOWLEDGMENTS FOR THE FIRST EDITION
Our colleagues have provided many constructive comments and encouragement for the completion of the first edition. Professor Timothy N. Trick, former head of the department of electrical and computer engineering at the University of Illinois at Urbana-Champaign, has strongly supported our efforts from the very beginning. The appointment of Sung-Mo Kang as an associate in the Center for Advanced Study at the University of Illinois at Urbana-Champaign helped to start the process.
Yusuf Leblebici acknowledges the full support and encouragement from the department of electrical and electronics engineering at Istanbul Technical University, where he introduced a new digital integrated circuits course based on the early version of this book and received very valuable feedback from his students. Yusuf Leblebici also thanks the ETA advanced Electronics Technologies Research and Development Foundation at Istanbul Technical University for their generous support.
Professor Elyse Rosenbaum and Professor Resve Saleh used the early versions of the manuscript as the textbook for ECE382 at Illinois and provided many helpful comments and corrections which have been fully incorporated with deep appreciation. Professor Elizabeth Brauer, currently at Northern Arizona University, has also done the same at the University of Kentucky.
The authors would like to express sincere gratitude to Professor Janak Patel of the University of Illinois at Urbana-Champaign for generously mentoring the authors in writing Chapter 16, Design for Testability. Professor Patel has provided many constructive comments and many of his expert views on the subject are reflected in this chapter. Professor Prith Banerjee of Northwestern University and Professor Farid Najm of the University of Illinois at Urbana-Champaign also provided many good comments. We would also like to thank Dr. Abhijit Dharchoudhury for his invaluable contribution to Chapter 15, Design for Manufacturability.
Professor Duran Leblebici of Istanbul Technical University, who is the father of the second author, reviewed the entire manuscript in its early development phase, and provided very extensive and constructive comments, many of which are reflected in the final version. Both authors gratefully acknowledge his support during all stages of this venture. We also thank Professor Cem Göknar of Istanbul Technical University, who offered very detailed and valuable comments on Design for Testability, and Professor U˜gur Çilingiro˜glu of the same university, who offered many excellent suggestions for improving the manuscript, especially the chapter on semiconductor memories.
Many of the authors’ former and current students at the University of Illinois at Urbana-Champaign also helped in the preparation of figures and verification of circuits using SPICE simulations. In particular, Dr. James Morikuni, Dr. Weishi Sun, Dr. Pablo Mena, Dr. Jaewon Kim, Mr. Steve Ho, and Mr. Sueng-Yong Park deserve recognition. Ms. Lilian Beck and the staff members of the Publications Office in the department of electrical and computer engineering at the University of Illinois at Urbana-Champaign read the entire manuscript and provided excellent editorial comments.
The authors would also like to thank Dr. Masakazu Shoji of AT&T Bell Laboratories, Professor Gerold W. Neudeck of Purdue University, Professor Chin-Long Wey of Michigan State University, Professor Andrew T. Yang of the University of Washington, Professor Marwan M. Hassoun of Iowa State University, Professor Charles E. Stroud of the University of Kentucky, Professor Lawrence Pileggi of the University of Texas at Austin, and Professor Yu Hen Hu of the University of Wisconsin at Madison, who read all or parts of the manuscript and provided many valuable comments and encouragement.
The editorial staff of McGraw-Hill has been an excellent source of strong support from the beginning of this textbook project. The venture was originally initiated with the enthusiastic encouragement from the previous electrical engineering editor, Ms. Anne (Brown) Akay. Mr. George Hoffman, in spite of his relatively short association, was extremely effective and helped settle the details of the publication planning. During the last stage, the new electrical engineering editor, Ms. Lynn Cox, and Mr. John Morriss, Mr. David Damstra, and Mr. Norman Pedersen of the Editing Department were superbly effective and we enjoyed dashing with them to finish the last mile.
ACKNOWLEDGMENTS FOR THE SECOND EDITION
The authors are truly indebted to many individuals who, with their efforts and their help, made the second edition possible. We would like to thank Dr. Wolfgang Fichtner, President and CEO of ISE Integrated Systems Engineering, Inc., and the technical staff of ISE in Zurich, Switzerland for providing computer-generated cross-sectional color graphics of MOS transistors and CMOS inverters, which are featured in the color plates. The first author acknowledges the support provided by the U.S. Senior Scientist Research Award from the Alexander von Humbold Stiftung in Germany, which was very helpful for the second edition. The appointments of the second author as Associate Professor at Worcester Polytechnic Institute and as Visiting Professor at the Swiss Federal Institute of Technology in Lausanne, Switzerland have provided excellent environments for the completion of the revision project. The second author also thanks Professor Daniel Mlynek of the Swiss Federal Institute of Technology in Lausanne for his continuous encouragement and support. Many of the authors’ former and current students at the University of Illinois at Urbana-Champaign, at the Swiss Federal Institute of Technology in Lausanne, and at Worcester Polytechnic Institute also helped in the preparation of figures and verification of circuits using SPICE simulations. In particular, Dr. James Stroming and Mr. Frank K. Gürkaynak deserve special recognition for their extensive and valuable efforts.
The authors would also like to thank Professor Charles Kime of the University of Wisconsin at Madison, Professor Gerold W. Neudeck of Purdue University, Professor D.E. Ioannou of George Mason University, Professor Subramanya Kalkur of the University of Colorado, Professor Jeffrey L. Gray of Purdue University, Professor Jacob Abraham of the University of Texas at Austin, Professor Hisham Z. Massoud of Duke University, Professor Norman C. Tien of Cornell University, Professor Rod Beresford of Brown University, Professor Elizabeth J. Brauer of Northern Arizona University, Professor Reginald J. Perry of Florida State University, and Professor Cem Göknar of Istanbul Technical University who read all or parts of the revised manuscript and provided their valuable comments and encouragement.
The editorial staff of McGraw-Hill has, as always, been wonderfully supportive from the beginning of the revision project. We thankfully recognize the contributions of our previous electrical engineering editor, Ms. Lynn Cox, and we appreciate the extensive efforts of Ms. Nina Kreiden, who helped the project get off the ground in its early stages. During the final stages of this project, Ms. Kelley Butcher, Ms. Karen Nelson, and Mr. Francis Owens have been extremely effective and helpful, and we enjoyed sharing this experience with them.
ACKNOWLEDGMENTS FOR THE THIRD EDITION
Several individuals have contributed with their time and their efforts to the third edition of our textbook. The authors would like to acknowledge the invaluable contribution of Dr. Seung-Moon Yoo who was instrumental in the extensive revision of the Memory chapter (Chapter 10). His technical insight, his meticulous attention to detail, and his very productive work are truly appreciated. The first author acknowledges the University of California at Santa Cruz for valuable support in his new position as Dean of the School of Engineering, and for enabling him to concentrate on the revision of the manuscript. The appointment of the second author as Full Professor at the Swiss Federal Institute of Technology in Lausanne, Switzerland has also provided an excellent environment for the completion of the project. The second author gratefully acknowledges Mme. Séverine Eggli for her valuable assistance in revisions, and for typing sections of the text. The authors thank Mr. Tom Vernier and the technical staff of the MOSIS organization for generously providing the SPICE BSIM parameters for TSMC 0.18 pm process that were extracted by MOSIS. The authors also acknowledge Dr. Michael W. Davidson of the Florida State University National High Magnetic Field Laboratory, for providing the DEC Alpha chip microphotographs that appear on the cover.
The authors would like to thank the following individuals who read all or parts of the revised manuscript and provided their valuable comments and encouragement.
Professor Massoud Pedram, University of Southern California
Professor Eby G. Friedman, University of Rochester
Professor Chien-In Henry Chen, Wright State University
Professor Ivan Kourtev, University of Pittsburgh
Professor Dimitris E. Ioannou, George Mason University
Professor Thottam S. Kalkur, University of Colorado at Colorado Springs
Professor Yong-Bin Kim, Northeastern University
Professor Pratapa Reddy, Rochester Institute of Technology
Professor Hisham Z. Massoud, Duke University
Professor Resve A. Saleh, University of British Columbia
Professor Simon Foo, Florida State University
Professor David W. Parent, San Jose State University
Professor Jaime Ramirez-Angulo, New Mexico State University
Professor Nur Touba, University of Texas at Austin
Professor Nicholas C. Rumin, McGill University
The editorial staff of McGraw-Hill has again been very helpful and supportive throughout the entire revision project. This project started with the insightful initiative of Mr. Tom Casson, our publisher at McGraw-Hill. We would like to acknowledge his valuable support and encouragement. We thankfully recognize the contributions of Ms. Michelle Flomenhoft, Ms. Betsy Jones, and Ms. Rose Koos. We especially thank them for their helpful assistance during all stages of this complex project, and for their patience and persistence. We also acknowledge Mr. Rick Noel for creating the cover design of the third edition. We truly enjoyed sharing this experience with the entire McGraw-Hill team.
Finally, we would like to acknowledge the support from our families, Myoung-A (Mia), Jennifer, and Jeffrey Kang, and Anil and Ebru Leblebici, for tolerating many of our physical and mental absences while we worked on the third edition of this book, and for providing us invaluable encouragement throughout the project.
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2003 McGraw-Hill Higher Education