This book is intended as an introductory logic design book for
students in computer science, computer engineering, and electrical
engineering. It has no prerequisites, although the maturity
attained through an introduction to engineering course or a first programming
course would be helpful. The book stresses fundamentals. It teaches through a large number
of examples. The philosophy of the author is that the only way to learn
logic design is to do a large number of design problems. Thus, in addition
to the numerous examples in the body of the text, each chapter has a
set of Solved Problems, that is, problems and their solutions, a large set
of Exercises (with answers to selected exercises in Appendix B), and a
Chapter Test (with answers in Appendix C). In addition, there are a set of
laboratory experiments that tie the theory to the real world. Appendix A
provides the background to do these experiments with a standard hardware
laboratory (chips, switches, lights, and wires), a breadboard simulator
(for the PC or Macintosh), and two schematic capture tools. The
course can be taught without the laboratory, but the student will benefit
significantly from the addition of 8 to 10 selected experiments.
Although computer-aided tools are widely used for the design of
large systems, the student must first understand the basics. The basics
provide more than enough material for a first course. The schematic capture
laboratory exercises and a section on Hardware Design Languages
in Chapter 8 provide some material for a transition to a second course
based on one of the computer-aided tool sets. Chapter 1 gives a brief overview of number systems as it applies to
the material of this book. (Those students who have studied this in an
earlier course can skip to Section 1.2.) It then discusses the steps in the
design process for combinational systems and the development of truth
tables. Chapter 2 introduces switching algebra and the implementation of
switching functions using common gates—AND, OR, NOT, NAND,
NOR, Exclusive-OR, and Exclusive-NOR. We are only concerned with
the logic behavior of the gates, not the electronic implementation. Chapter 3 deals with simplification using the Karnaugh map. It provides
methods for solving problems (up to six variables) with both single
and multiple outputs. Chapter 4 introduces two algorithmic methods for solving combinational
problems—the Quine-McCluskey method and Iterated Consensus.
Both provide all of the prime implicants of a function or set of
functions, and then use the same tabular method to find minimum sum of
products solutions. Chapter 5 is concerned with the design of larger combinational
systems. It introduces a number of commercially available larger devices,
including adders, comparators, decoders, encoders and priority
encoders, and multiplexers. That is followed by a discussion of the use
of logic arrays—ROMs, PLAs, and PALs for the implementation of
medium scale combinational systems. Finally, two larger systems are
designed. Chapter 6 introduces sequential systems. It starts by examining the
behavior of latches and flip flops. It then discusses techniques to analyze
the behavior of sequential systems. Chapter 7 introduces the design process for sequential systems. The
special case of counters is studied next. Finally, the solution of word
problems, developing the state table or state diagram from a verbal
description of the problem is presented in detail. Chapter 8 looks at larger sequential systems. It starts by examining
the design of shift registers and counters. Then, PLDs are presented.
Three techniques that are useful in the design of more complex
systems—ASM diagrams, one-shot encoding, and HDLs—are discussed
next. Finally, two examples of larger systems are presented. Chapter 9 deals with state reduction and state assignment issues.
First, a tabular approach for state reduction is presented. Then partitions
are utilized both for state reduction and for achieving a state assignment
that will utilize less combinational logic. A feature of this text is the Solved Problems. Each chapter has a
large number of problems, illustrating the techniques developed in the
body of the text, followed by a detailed solution of each problem. Students
are urged to solve each problem (without looking at the solution)
and then compare their solution with the one shown. Each chapter contains a large set of exercises. Answers to a selection
of these are contained in Appendix B. Solutions will be made available
to instructors through the Web. In addition, each chapter concludes with
a Chapter Test; answers are given in Appendix C. Another unique feature of the book is the laboratory exercises, included
in Appendix A. Four platforms are presented—a hardware based
Logic Lab (using chips, wires, etc.); a hardware lab simulator that allows
the student to “connect” wires on the computer screen; and two circuit
capture programs, LogicWorks 4 and Altera Max+plus II. Enough
information is provided about each to allow the student to perform a
variety of experiments. A set of 26 laboratory exercises are presented.
Several of these have options, to allow the instructor to change the
details from one term to the next. We teach this material as a four-credit course that includes an
average of 31/2 hours per week of lecture, plus, typically, eight laboratory
exercises. (The lab is unscheduled; it is manned by Graduate
Assistants 40 hours per week; they grade the labs.) In that course we
cover. Chapter 1: all of itChapter 2: all but 2.11Chapter 3: all of itChapter 4: if time permits at the end of the semesterChapter 5: all but 5.8. However, there is a graded design problem
based on that material (10 percent of the grade; students usually
working in groups of 2 or 3).Chapter 6: all of itChapter 7: all of itChapter 8: 8.1, 8.2, 8.3. We sometimes have a second project based
on 8.7.Chapter 9 and Chapter 4: We often have some time to look at one
of these. We have never been able to cover both.With less time, the coverage of Section 2.10 could be minimized.
Section 3.5 is not needed for continuity; Section 3.6 is used somewhat in
the discussion of PLAs in Section 5.7.2. Chapter 5 is not needed for anything
else in the text, although many of the topics are useful to students
elsewhere. The instructor can pick and choose among the topics. The SR
and T flip flops could be omitted in Chapters 6 and 7. Sections 7.2 and 7.3
could be omitted without loss of continuity. As is the case for Chapter 5,
the instructor can pick and choose among the topics of Chapter 8.With a
limited amount of time, Section 9.1 could be covered.With more time, it
could be skipped and state reduction taught using partitions (9.2 and 9.3). |