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Learning Objectives
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Upon completing this chapter, students should be able to:
  1. Introduce binary digital logic concepts
  2. Explore the voltage transfer characteristics of ideal and nonideal inverters
  3. Define logic levels and logic states at the input and output of logic gates
  4. Present goals for logic gate design
  5. Understand the need for noise rejection and the concept of noise margin
  6. Introduce measures of dynamic performance of logic gates including rise time, fall time, propagation delay, and power-delay product
  7. Review Boolean algebra and the NOT, OR, AND, NOR, and NAND functions
  8. Explore simple transistor implementations of the inverter
  9. Introduce diode logic and diode-transistor logic circuits
  10. Explore the design of MOS logic gates employing single transistor types—either NMOS or PMOS transistors (known as single-channel technology)
  11. Learn basic inverter design; discover why transistors are used in place of resistors
  12. Understand design and performance differences between saturated load, linear load, and depletion-mode load circuits
  13. Present examples of noise margin calculations
  14. Learn to design multiinput NAND and NOR gates
  15. Learn to design complex logic gates including sum-of-products representations
  16. Develop expressions and approximation techniques for calculating rise time, fall time, and propagation delay of the various single-channel logic families







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